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When the SRIO Core library is uploaded, the FPGA expander card becomes an SRIO endpoint capable of processing SRIO traffic data through any standard LVDS interface (extra cables available at STx). The remaining FPGA gates can be coded to provide a wide variety of co-processor tasks including:
- Security algorithms
- Base band processing functions
- Fast-path networking
- And many others
Click here to download more information about the Mezzanine Adapter.
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